Senior Design Verification Engineer Job at Invent Staffing, Dallas, TX

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  • Invent Staffing
  • Dallas, TX

Job Description

Job Description:

We are looking for a Senior Analog Design Verification Engineer to join our team in Dallas, TX. The ideal candidate should have expertise in V-AMS, SystemVerilog, and UVM , with a strong understanding of analog and digital verification methodologies . The candidate should be comfortable working with mixed-signal testbenches and performing functional, parametric, and DFT/reliability testing.

Responsibilities:

  • Understand analog blocks at a high level to control V-AMS (Verilog Analog Mixed Signal Blocks) .
  • Learn and understand the testbench architecture .
  • Gain knowledge of the DIGTOP block and its control/stimulation methods.
  • Develop test sequences from high-level descriptions with initial collaboration.
  • Execute and oversee three types of tests :
  • Functional testing
  • Parametric testing
  • DFT/Reliability testing
  • Create monitors to verify proper part functionality.
  • Perform simulations over corners and analyze/report results.
  • Review waveforms in SimVision and create SVCF files for sharing.
  • Provide weekly progress reports.

Qualifications & Skills:

  • 8+ years of experience in V-AMS .
  • 5+ years of experience in SystemVerilog/UVM .
  • Experience verifying devices using LBC10 technology .
  • Expertise in DIGTOP block verification , including:
  • ARM M0 processor
  • Analog front-end (Type-C detection logic, power paths with OVP/UVP/Current limits, etc.)
  • Hands-on experience with the complete verification cycle , including:
  • Development of test plans .
  • BFM/Driver/Monitor/Scoreboard component development and integration.
  • Stress/corner testing, failure debug, gate-level simulations, assertions, and coverage closure .
  • Proficiency in SVTB/UVM and C++ testbench development .

Education:

  • Bachelor's / Master's / Ph.D. in Electrical Engineering, Computer Engineering, or related field.

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